EMI: Back to the Drawing Board - Again!
May 29, 2009
-By John Whalen
All too often during product design, well intentioned product managers, rightfully scared from prior EMI encounters, especially during the beginning of a new project, schedule large amounts of time for EMI evaluation and prevention. Program managers add in time for the illusively fiendish problems that always seem to delay projects at the very end. As schedules inevitably are delayed, the big gaps are minimized to small gaps, or eliminated. The simulations and Printed Circuit Board (PCB) evaluations and trace routing guidelines are placed in the hands of the PCB Autorouter.
Often, the EMI engineer at the end of a project will carry the new consumer product back from his/her EMI chamber and trusty spectrum analyzer, with a fist full of graphs with large peaks and valleys. “It’s got problems”, he/she says, “but we can fix it. You just need to eliminate this spike from the system clock that is generating harmonics large enough to turn on a light bulb.” Rerouting the clock requires a new Printed Circuit Board layout. That can, in itself, create new problems associated with parasitics. The next PCB revision takes a full eight weeks to design, populate, test and evaluate.
This time, the clock traces have been placed too close to the image sensor system. The result is that when the camera is turned on with this new handset, the video screen has vertical bars from left to right corrupting the screen. Again, the device is put through EMI testing. This time the handset passes with flying colors…. however, due to the close proximity of the image sensor system, the PCB must be redesigned yet again. What has been your experience in solving these challenges?
About the author:
Business Development Manager, Signal Path Analog
Tags: EMI, Fairchild Semiconductor, PCB, Printed Circuit Board
